s3c2440 移值u-boot-2016.03 第6篇 支持mtd yaffs 烧写
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1, 解决启动时的错误
Warning - bad CRC, using default environment
搜索发现 在 /tools/env/fw_env.c 中
/* 放在NAND FLASH 中 大小 128K 开始地址 */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10)
#define CONFIG_ENV_OFFSET (256<<10)
#define CONFIG_ENV_SIZE CONFIG_SYS_ENV_SECT_SIZE
2, 添加 MTD
#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
#define MTDIDS_DEFAULT "nand0=nand"
#define MTDPARTS_DEFAULT "mtdparts=nand:256k(uboot),"\
"128k(env),"\
"2m(kernel),-(fs)"
在 /common/board_r.c
man_loop 中添加
run_command("mtdparts default", 0);
擦除 nand flash
nand erase.part uboot
nand write 0x30000000 uboot
3, 下载试验
nfs 0x30000000 192.168.1.10:/nfs/fs.yaffs2
nand erase.part fs
nand write.yaffs 0x30000000 0x00260000 0x8607c0 (文件大小)
set bootargs noinitrd root=/dev/mtdblock3 init=/linuxrc console=ttySAC0
boot 启动
写入出错
Unknown nand command suffix ‘.yaffs2‘
4, 支持 yaffs2
在 smdk2440.h 发现有个，配置后 #define CONFIG_YAFFS2
编译后，大了很多，有 335K ，菜单多了几个功能
yls - yaffs ls
ymkdir - YAFFS mkdir
ymount - mount yaffs
ymv - YAFFS mv
yrd - read file from yaffs
yrdm - read file to memory from yaffs
yrm - YAFFS rm
yrmdir - YAFFS rmdir
ytrace - show/set yaffs trace mask
yumount - unmount yaffs
ywr - write file to yaffs
ywrm - write file from memory to yaffs
试着挂载，失败，文档也没有找到，导致 u-boot 也非常大，换一种方法。
之前可以使用 #define CONFIG_CMD_NAND_YAFFS
对比了 u-boot 2013 2014 2015 都有这个功能， 但从 2015-10 移除了
参考u-boot 2015修改代码添加支持
/* 添加兼容 yaffs2 烧写支持 */
/include/configs/smdk2440.h
#define CONFIG_CMD_NAND_YAFFS
/cmd/nand.c
在543line:
if (strncmp(cmd, "read", 4) == 0 || strncmp(cmd, "write", 5) == 0) {
里面添加 622line:
#ifdef CONFIG_CMD_NAND_YAFFS
} else if (!strcmp(s, ".yaffs")) {
if (read) {
printf("Unknown nand command suffix ‘%s‘.\n", s);
return 1;
}
ret = nand_write_skip_bad(nand, off, &rwsize, NULL,
maxsize, (u_char *)addr,
WITH_YAFFS_OOB);
#endif
/include/nand.h 101line: 添加
#define WITH_YAFFS_OOB (1 << 0) /* whether write with yaffs format. This flag * is a ‘mode‘ meaning it cannot be mixed with * other flags */
/drivers/mtd/nand/nand_util.c 583line:
#ifdef CONFIG_CMD_NAND_YAFFS
if (flags & WITH_YAFFS_OOB) {
if (flags & ~WITH_YAFFS_OOB)
return -EINVAL;
int pages;
pages = nand->erasesize / nand->writesize;
blocksize = (pages * nand->oobsize) + nand->erasesize;
if (*length % (nand->writesize + nand->oobsize)) {
printf("Attempt to write incomplete page"
" in yaffs mode\n");
return -EINVAL;
}
} else
#endif
666line:
#ifdef CONFIG_CMD_NAND_YAFFS
if (flags & WITH_YAFFS_OOB) {
int page, pages;
size_t pagesize = nand->writesize;
size_t pagesize_oob = pagesize + nand->oobsize;
struct mtd_oob_ops ops;
ops.len = pagesize;
ops.ooblen = nand->oobsize;
ops.mode = MTD_OPS_AUTO_OOB;
ops.ooboffs = 0;
pages = write_size / pagesize_oob;
for (page = 0; page < pages; page++) {
WATCHDOG_RESET();
ops.datbuf = p_buffer;
ops.oobbuf = ops.datbuf + pagesize;
rval = mtd_write_oob(nand, offset, &ops);
if (rval != 0)
break;
offset += pagesize;
p_buffer += pagesize_oob;
}
}
else
#endif
{
这里要包含下面的部分。 最后 u-boot 改完后，会有大补丁。大家可以下载比较。
..............
}
编译后，252K
重新烧写出错
NAND write to offset 2a1000 failed -22 0 bytes written: ERROR
ops.mode = MTD_OPS_RAW; 这里也要改。
最终 完成了， 可以烧写 yaffs2 ， 也能使用 NAND FLASH NOR FLASH ，网卡， u-boot 差不多结束了。
2016.03.u-boot 补丁
1 diff -urN u-boot-2016.03/arch/arm/cpu/arm920t/init.c u-boot-2016.03ok/arch/arm/cpu/arm920t/init.c 2 --- u-boot-2016.03/arch/arm/cpu/arm920t/init.c 1970-01-01 07:00:00.000000000 +0700 3 +++ u-boot-2016.03ok/arch/arm/cpu/arm920t/init.c 2016-05-19 05:34:00.645377559 +0800 4 @@ -0,0 +1,206 @@ 5 +/* NAND FLASH控制器 */ 6 +#define NFCONF (*((volatile unsigned long *)0x4E000000)) 7 +#define NFCONT (*((volatile unsigned long *)0x4E000004)) 8 +#define NFCMMD (*((volatile unsigned char *)0x4E000008)) 9 +#define NFADDR (*((volatile unsigned char *)0x4E00000C)) 10 +#define NFDATA (*((volatile unsigned char *)0x4E000010)) 11 +#define NFSTAT (*((volatile unsigned char *)0x4E000020)) 12 + 13 +/* CLK */ 14 +#define CLKDIVN (*(volatile unsigned long *)0x4C000014) 15 +#define MPLLCON (*(volatile unsigned long *)0x4C000004) 16 + 17 +/* SDRAM */ 18 +#define BWSCON (*(volatile unsigned long *)0x48000000) 19 +#define BANKCON4 (*(volatile unsigned long *)0x48000014) 20 +#define BANKCON6 (*(volatile unsigned long *)0x4800001c) 21 +#define REFRESH (*(volatile unsigned long *)0x48000024) 22 +#define BANKSIZE (*(volatile unsigned long *)0x48000028) 23 +#define MRSRB6 (*(volatile unsigned long *)0x4800002c) 24 + 25 +void init_clock(void) 26 +{ 27 + //Mpll = 400M 28 + MPLLCON = (0x5c<<12) | (1<<4) | 1; 29 + //FCLK 400M HCLK 100M PCLK 50M 30 + CLKDIVN = 2<<1 | 1<<0; 31 + __asm__( 32 + "mrc p15,0,r0,c1,c0,0\n" 33 + "orr r0,r0,#0xc0000000\n" 34 + "mcr p15,0,r0,c1,c0,0\n" 35 + ); 36 +} 37 + 38 +void init_sdram(void) 39 +{ 40 + #if 0 41 + BWSCON = 1<<25; 42 + BANKCON6 = 1<<16 | 1<<15 | 1; 43 + REFRESH = (1<<23) + 1268; 44 + BANKSIZE = 1<<7 | 1<<4 | 1; 45 + MRSRB6 = 0x30; 46 + #else 47 + BWSCON = 1<<25 | 1<<16; 48 + BANKCON4 = 0x00000740; 49 + BANKCON6 = 1<<16 | 1<<15 | 1; 50 + REFRESH = (1<<23) + 1268; 51 + BANKSIZE = 1<<7 | 1<<4 | 1; 52 + MRSRB6 = 0x30; 53 + #endif 54 +} 55 + 56 +void clear_bss(void) 57 +{ 58 + extern int __bss_start, __bss_end; 59 + int *p = &__bss_start; 60 + 61 + for (; p < &__bss_end; p++) 62 + { 63 + *p = 0; 64 + } 65 +} 66 + 67 +static void nand_latency(void) 68 +{ 69 + int i=100; 70 + while(i--); 71 +} 72 + 73 +static void nand_is_ready(void) 74 +{ 75 + //bit 0 : 1 不忙了 76 + while(! (NFSTAT & 1)); 77 +} 78 + 79 +static void nand_write_addr(unsigned int addr) 80 +{ 81 + int col, page; 82 + col = addr % 2048; 83 + page = addr / 2048; 84 + 85 + NFADDR = col & 0xff; /* Column Address A0~A7 */ 86 + nand_latency(); 87 + NFADDR = (col >> 8) & 0x0f; /* Column Address A8~A11 */ 88 + nand_latency(); 89 + NFADDR = page & 0xff; /* Row Address A12~A19 */ 90 + nand_latency(); 91 + NFADDR = (page >> 8) & 0xff; /* Row Address A20~A27 */ 92 + nand_latency(); 93 + NFADDR = (page >> 16) & 0x03; /* Row Address A28~A29 */ 94 + nand_latency(); 95 +} 96 + 97 +static unsigned char nand_read_char(void) 98 +{ 99 + //只保留8个bit 100 + return NFDATA & 0xff; 101 +} 102 + 103 +static void nand_cmd(unsigned char cmd) 104 +{ 105 + NFCMMD = cmd; 106 + nand_latency(); 107 +} 108 + 109 +static void nand_select_chip(void) 110 +{ 111 + //1bit : 0 选中 112 + NFCONT &= ~(1<<1); 113 +} 114 + 115 +static void nand_deselect_chip(void) 116 +{ 117 + //1bit : 1 选中 118 + NFCONT |= (1<<1); 119 +} 120 + 121 +static void nand_reset(void) 122 +{ 123 + nand_select_chip(); 124 + nand_cmd(0xff); 125 + nand_deselect_chip(); 126 +} 127 + 128 +void nand_init_ll(void) 129 +{ 130 + //TACLS 3.3v 时 12ns 131 + #define TACLS 0 132 + //12ns 133 + #define TWRPH0 1 134 + //5ns 135 + #define TWRPH1 0 136 + NFCONF = TACLS<<12 | TWRPH0<<8 | TWRPH1<<4; 137 + /* 4 ECC 138 + * 1 CE 先不选中，用的时候在选中 139 + * 0 启动 flash controller 140 + */ 141 + NFCONT = 1<<4 | 1<<1 | 1; 142 + nand_reset(); 143 +} 144 + 145 +static void nand_read(unsigned int addr, unsigned char *buf, int len) 146 +{ 147 + //选中 148 + nand_select_chip(); 149 + //j 地址可能不是从0对齐开始读的 150 + unsigned int i = addr,j = addr % 2048; 151 + for(; i<(addr + len);) 152 + { 153 + //读命令 154 + nand_cmd(0x00); 155 + nand_is_ready(); 156 + 157 + //发送地址 158 + nand_write_addr(i); 159 + nand_is_ready(); 160 + 161 + //在次发出读命令 162 + nand_cmd(0x30); 163 + nand_is_ready(); 164 + //读2K 165 + for(; j<2048; j++) 166 + { 167 + *buf = nand_read_char(); 168 + buf++; 169 + i++; 170 + } 171 + j=0; 172 + nand_latency(); 173 + } 174 + //取消选中 175 + nand_deselect_chip(); 176 +} 177 + 178 +static int boot_is_nor() 179 +{ 180 + //利用 NOR 不能写的特点判断 181 + volatile unsigned int *p = (volatile unsigned int *)0; 182 + unsigned int val; 183 + val = *p; 184 + *p = 0x12345678; 185 + if(0x12345678 == *p) 186 + { 187 + *p = val; 188 + return 0; 189 + } 190 + return 1; 191 +} 192 + 193 +//片内4K 的程序要复制到链接SDRAM中去 194 +void copy_code_to_sdram(unsigned char *src,unsigned char *dst,int len) 195 +{ 196 + int i = 0; 197 + if(boot_is_nor()) 198 + { 199 + while(i < len) 200 + { 201 + dst[i] = src[i]; 202 + i++; 203 + } 204 + } 205 + else 206 + { 207 + nand_read((int)src, dst, len); 208 + } 209 +} 210 + 211 diff -urN u-boot-2016.03/arch/arm/cpu/arm920t/Makefile u-boot-2016.03ok/arch/arm/cpu/arm920t/Makefile 212 --- u-boot-2016.03/arch/arm/cpu/arm920t/Makefile 2016-03-14 22:20:21.000000000 +0800 213 +++ u-boot-2016.03ok/arch/arm/cpu/arm920t/Makefile 2016-05-17 06:48:31.767626866 +0800 214 @@ -8,6 +8,7 @@ 215 extra-y = start.o 216 217 obj-y += cpu.o 218 +obj-y += init.o 219 obj-$(CONFIG_USE_IRQ) += interrupts.o 220 221 obj-$(CONFIG_EP93XX) += ep93xx/ 222 diff -urN u-boot-2016.03/arch/arm/cpu/arm920t/start.S u-boot-2016.03ok/arch/arm/cpu/arm920t/start.S 223 --- u-boot-2016.03/arch/arm/cpu/arm920t/start.S 2016-03-14 22:20:21.000000000 +0800 224 +++ u-boot-2016.03ok/arch/arm/cpu/arm920t/start.S 2016-05-17 06:48:31.782641369 +0800 225 @@ -82,11 +82,50 @@ 226 227 /* FCLK:HCLK:PCLK = 1:2:4 */ 228 /* default FCLK is 120 MHz ! */ 229 - ldr r0, =CLKDIVN 230 - mov r1, #3 231 - str r1, [r0] 232 + //ldr r0, =CLKDIVN 233 + //mov r1, #3 234 + //str r1, [r0] 235 + 236 + /* 设置分频参数 */ 237 + ldr r0, =CLKDIVN 238 + mov r1, #0x05; /* FCLK:HCLK:PCLK=1:4:8 */ 239 + str r1, [r0] 240 + 241 + /* 如果HDIVN非0，CPU的总线模式应该从“fast bus mode”变为“asynchronous bus mode” */ 242 + mrc p15, 0, r1, c1, c0, 0 /* 读出控制寄存器 */ 243 + orr r1, r1, #0xc0000000 /* 设置为“asynchronous bus mode” */ 244 + mcr p15, 0, r1, c1, c0, 0 /* 写入控制寄存器 */ 245 + 246 + /* 配置时钟 */ 247 + #define S3C2440_MPLL_400MHZ ((0x5c<<12)|(0x01<<4)|(0x01)) 248 + ldr r0, =0x4c000004 249 + ldr r1, =S3C2440_MPLL_400MHZ 250 + str r1, [r0] 251 + 252 #endif /* CONFIG_S3C24X0 */ 253 254 + /** 255 + * 调用 init.c 中的初始化 256 + * 因为已经初始化好内存 所以 sp 在 顶部 257 + * 在 NOR 时不能用片内 4K 258 + */ 259 + ldr sp, =4096 260 + bl init_sdram 261 + ldr sp, =0x34000000 262 + bl nand_init_ll 263 + /** 264 + * 从 0 地址开始复制 到 SDRAM 中 265 + * 在 smdk2440.h 中定义 #define CONFIG_SYS_TEXT_BASE 266 + * u-boot 的加载地址 267 + */ 268 + mov r0,#0 269 + ldr r1, =CONFIG_SYS_TEXT_BASE 270 + ldr r2, =__bss_start 271 + sub r2, r2, r1 272 + bl copy_code_to_sdram 273 + bl clear_bss 274 + ldr pc, =_main 275 + 276 /* 277 * we do sys-critical inits only at reboot, 278 * not when booting from ram! 279 @@ -95,8 +134,6 @@ 280 bl cpu_init_crit 281 #endif 282 283 - bl _main 284 - 285 /*------------------------------------------------------------------------------*/ 286 287 .globl c_runtime_cpu_setup 288 diff -urN u-boot-2016.03/arch/arm/cpu/u-boot.lds u-boot-2016.03ok/arch/arm/cpu/u-boot.lds 289 --- u-boot-2016.03/arch/arm/cpu/u-boot.lds 2016-03-14 22:20:21.000000000 +0800 290 +++ u-boot-2016.03ok/arch/arm/cpu/u-boot.lds 2016-05-12 09:28:12.338040880 +0800 291 @@ -32,7 +32,7 @@ 292 */ 293 /DISCARD/ : { *(.rel._secure*) } 294 #endif 295 - . = 0x00000000; 296 + . = 0; 297 298 . = ALIGN(4); 299 .text : 300 diff -urN u-boot-2016.03/arch/arm/Kconfig u-boot-2016.03ok/arch/arm/Kconfig 301 --- u-boot-2016.03/arch/arm/Kconfig 2016-03-14 22:20:21.000000000 +0800 302 +++ u-boot-2016.03ok/arch/arm/Kconfig 2016-05-09 08:48:52.118143749 +0800 303 @@ -91,6 +91,10 @@ 304 config TARGET_SMDK2410 305 bool "Support smdk2410" 306 select CPU_ARM920T 307 + 308 +config TARGET_SMDK2440 309 + bool "Support smdk2440" 310 + select CPU_ARM920T 311 312 config TARGET_ASPENITE 313 bool "Support aspenite" 314 @@ -829,6 +833,7 @@ 315 source "board/phytec/pcm052/Kconfig" 316 source "board/ppcag/bg0900/Kconfig" 317 source "board/samsung/smdk2410/Kconfig" 318 +source "board/samsung/smdk2440/Kconfig" 319 source "board/sandisk/sansa_fuze_plus/Kconfig" 320 source "board/schulercontrol/sc_sps_1/Kconfig" 321 source "board/siemens/draco/Kconfig" 322 diff -urN u-boot-2016.03/arch/arm/lib/crt0.S u-boot-2016.03ok/arch/arm/lib/crt0.S 323 --- u-boot-2016.03/arch/arm/lib/crt0.S 2016-03-14 22:20:21.000000000 +0800 324 +++ u-boot-2016.03ok/arch/arm/lib/crt0.S 2016-05-16 17:11:44.287690421 +0800 325 @@ -99,7 +99,6 @@ 326 * relocate_code(addr_moni). Trick here is that we‘ll return 327 * ‘here‘ but relocated. 328 */ 329 - 330 ldr sp, [r9, #GD_START_ADDR_SP] /* sp = gd->start_addr_sp */ 331 #if defined(CONFIG_CPU_V7M) /* v7M forbids using SP as BIC destination */ 332 mov r3, sp 333 @@ -130,14 +129,17 @@ 334 335 bl c_runtime_cpu_setup /* we still call old routine here */ 336 #endif 337 + 338 + 339 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_FRAMEWORK) 340 -# ifdef CONFIG_SPL_BUILD 341 +#ifdef CONFIG_SPL_BUILD 342 /* Use a DRAM stack for the rest of SPL, if requested */ 343 bl spl_relocate_stack_gd 344 cmp r0, #0 345 movne sp, r0 346 movne r9, r0 347 -# endif 348 +#endif 349 + 350 ldr r0, =__bss_start /* this is auto-relocated! */ 351 352 #ifdef CONFIG_USE_ARCH_MEMSET 353 @@ -177,3 +179,4 @@ 354 #endif 355 356 ENDPROC(_main) 357 + 358 diff -urN u-boot-2016.03/arch/arm/lib/relocate.S u-boot-2016.03ok/arch/arm/lib/relocate.S 359 --- u-boot-2016.03/arch/arm/lib/relocate.S 2016-03-14 22:20:21.000000000 +0800 360 +++ u-boot-2016.03ok/arch/arm/lib/relocate.S 2016-05-16 17:11:48.481661370 +0800 361 @@ -26,6 +26,7 @@ 362 363 ENTRY(relocate_vectors) 364 365 + 366 #ifdef CONFIG_CPU_V7M 367 /* 368 * On ARMv7-M we only have to write the new vector address 369 diff -urN u-boot-2016.03/board/samsung/smdk2440/Kconfig u-boot-2016.03ok/board/samsung/smdk2440/Kconfig 370 --- u-boot-2016.03/board/samsung/smdk2440/Kconfig 1970-01-01 07:00:00.000000000 +0700 371 +++ u-boot-2016.03ok/board/samsung/smdk2440/Kconfig 2016-05-18 15:00:45.794906725 +0800 372 @@ -0,0 +1,15 @@ 373 +if TARGET_SMDK2440 374 + 375 +config SYS_BOARD 376 + default "smdk2440" 377 + 378 +config SYS_VENDOR 379 + default "samsung" 380 + 381 +config SYS_SOC 382 + default "s3c24x0" 383 + 384 +config SYS_CONFIG_NAME 385 + default "smdk2440" 386 + 387 +endif 388 diff -urN u-boot-2016.03/board/samsung/smdk2440/lowlevel_init.S u-boot-2016.03ok/board/samsung/smdk2440/lowlevel_init.S 389 --- u-boot-2016.03/board/samsung/smdk2440/lowlevel_init.S 1970-01-01 07:00:00.000000000 +0700 390 +++ u-boot-2016.03ok/board/samsung/smdk2440/lowlevel_init.S 2016-05-18 15:00:45.654313065 +0800 391 @@ -0,0 +1,147 @@ 392 +/* 393 + * Memory Setup stuff - taken from blob memsetup.S 394 + * 395 + * Copyright (C) 1999 2000 2001 Erik Mouw ([email protected]) and 396 + * Jan-Derk Bakker ([email protected]) 397 + * 398 + * Modified for the Samsung SMDK2410 by 399 + * (C) Copyright 2002 400 + * David Mueller, ELSOFT AG, <[email protected]> 401 + * 402 + * SPDX-License-Identifier: GPL-2.0+ 403 + */ 404 + 405 + 406 +#include <config.h> 407 + 408 +/* some parameters for the board */ 409 + 410 +/* 411 + * 412 + * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S 413 + * 414 + * Copyright (C) 2002 Samsung Electronics SW.LEE <[email protected]> 415 + * 416 + */ 417 + 418 +#define BWSCON 0x48000000 419 + 420 +/* BWSCON */ 421 +#define DW8 (0x0) 422 +#define DW16 (0x1) 423 +#define DW32 (0x2) 424 +#define WAIT (0x1<<2) 425 +#define UBLB (0x1<<3) 426 + 427 +#define B1_BWSCON (DW32) 428 +#define B2_BWSCON (DW16) 429 +#define B3_BWSCON (DW16 + WAIT + UBLB) 430 +#define B4_BWSCON (DW16) 431 +#define B5_BWSCON (DW16) 432 +#define B6_BWSCON (DW32) 433 +#define B7_BWSCON (DW32) 434 + 435 +/*以上是关于s3c2440 移值u-boot-2016.03 第6篇 支持mtd yaffs 烧写的主要内容，如果未能解决你的问题，请参考以下文章s3c2440 移值u-boot-2016.03 第6篇 支持mtd yaffs 烧写
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