Rockchip RK3588 kernel dts解析之USB模块
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Rockchip RK3588 kernel dts解析之USB模块
文章目录
RK3588 支持 5 个独立的 USB 控制器，包括：2 个 USB 2.0 HOST 控制器，2 个 USB 3.1 OTG 控制器，1 个 USB 3.1 HOST 控制器。RK3588S 相比 RK3588 少了 1 个 USB 3.1 OTG 控制器。USB 控制器的具体类型如下表 1 所示，如果要了解更详细的 USB 控制器特性，请参考 RK3588 datasheet。
表 1 RK3588 USB 控制器列表
| 芯片/控制器 | USB 2.0 HOST (EHCI&OHCI) | USB 3.1 OTG (DWC3&xHCI) | USB 3.1 Host(xHCI) |
|---|---|---|---|
| RK3588 | 2 | 2 | 1 |
| RK3588S | 2 | 1 | 1 |
RK3588 支持 7 个独立的 USB PHY，包括：4 个 USB 2.0 PHY，2 个 USB 3.1/DP Combo PHY，1 个 USB 3.1/SATA/PCIe Combo PHY。RK3588S 相比 RK3588 少了 1 个 USB 2.0 PHY 和 1 个 USB 3.1/DP Combo PHY。
RK3588 USB DTS 配置
RK3588 USB DTS 配置，包括：芯片级 USB 控制器/PHY DTSI 配置和板级 DTS 配置。
详细配置方法，请参考内核文档：
- kernel/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
- kernel/Documentation/devicetree/bindings/usb/generic-ohci.yaml
- kernel/Documentation/devicetree/bindings/usb/generic-ehci.yaml
- kernel/Documentation/devicetree/bindings/connector/usb-connector.yaml
- kernel/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
- kernel/Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml
- kernel/Documentation/devicetree/bindings/phy/phy/phy-rockchip-naneng-combphy.txt
USB 芯片级 DTSI 配置
RK3588 DTSI 文件中 USB 控制器和 PHY 相关的主要节点如下所示，因为 USB DTSI 节点配置的是 USB 控制器和 PHY 的公共资源和属性，建议开发者不要改动。
USB 3.1 OTG0、USB 2.0 HOST0/1、USB 3.1 HOST2 的 DTSI配置放在 rk3588s-evb.dtsi
USB 3.1 OTG1 的 DTSI 配置放在 rk3588-evb.dts
对应的 DTSI 完整路径如下：
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
arch/arm64/boot/dts/rockchip/rk3588.dtsi
Note：
RK3588/RK3588S 的所有 USB 控制器和 PHY，在 rk3588s-evb.dtsi 和 rk3588-evb.dtsi 中，全部配置为 status = “okay”，如果产品的板级 DTS 文件有 include 这两个 EVB DTSI 文件，则只需要在板级 DTS 文件中，将不使用的 USB 节点配置为 “disabled” 即可。
USB 接口和 USB DTS 节点的对应关系如下表 16 所示。
表 16 RK3588 USB 接口和 USB DTS 节点的对应关系
| USB 接口名称(原理图) | USB 控制器 DTS 节点 | USB PHY DTS 节点 |
|---|---|---|
| TYPEC0 | usbdrd3_0 usbdrd_dwc3_0 | u2phy0 u2phy0_otg usbdp_phy0 usbdp_phy0_u3 |
| TYPEC1 | usbdrd3_1 usbdrd_dwc3_1 | u2phy1 u2phy1_otg usbdp_phy1 usbdp_phy1_u3 |
| USB20_HOST0 | usb_host0_ehci usb_host0_ohci | u2phy2 u2phy2_host |
| USB20_HOST1 | usb_host1_ehci usb_host1_ohci | u2phy3 u2phy3_host |
| USB30_2 | usbhost3_0 usbhost_dwc3_0 | combphy2_psu |
USB 控制器 DTSI 节点如下：
#USB3.1 OTG0 Controller
usbdrd3_0: usbdrd3_0
compatible = "rockchip,rk3588-dwc3", "rockchip,rk3399-dwc3";
......
usbdrd_dwc3_0: usb@fc000000
compatible = "snps,dwc3";
......
;
;
#USB2.0 HOST0 Controller
usb_host0_ehci: usb@fc800000
compatible = "generic-ehci";
......
;
usb_host0_ohci: usb@fc840000
compatible = "generic-ohci";
......
;
#USB2.0 HOST1 Controller
usb_host1_ehci: usb@fc880000
compatible = "generic-ehci";
......
;
usb_host1_ohci: usb@fc8c0000
compatible = "generic-ohci";
......
;
#USB3.1 HOST2 Controller
usbhost3_0: usbhost3_0
compatible = "rockchip,rk3588-dwc3", "rockchip,rk3399-dwc3";
......
usbhost_dwc3_0: usb@fcd00000
compatible = "snps,dwc3";
......
;
;
#USB3.1 OTG1 Controller
usbdrd3_1: usbdrd3_1
compatible = "rockchip,rk3588-dwc3", "rockchip,rk3399-dwc3";
......
usbdrd_dwc3_1: usb@fc400000
compatible = "snps,dwc3";
......
;
;
USB PHY DTSI 节点如下：
注意：USB PHY 和 USB 控制器具有一一对应的关系，需要成对配置。在芯片内部，USB PHY 和 控制器的连接关系，请参考 [RK3588 USB 控制器和 PHY 简介](#RK3588 USB 控制器和 PHY 简介)的图 1 和 表 16。在DTSI 节点中，通过 USB 控制器节点的 “phys” 属性关联对应的 USB PHY。
#USB2.0 PHY0
usb2phy0_grf: syscon@fd5d0000
compatible = "rockchip,rk3588-usb2phy-grf", "syscon",
"simple-mfd";
......
u2phy0: usb2-phy@0
compatible = "rockchip,rk3588-usb2phy";
......
u2phy0_otg: otg-port
#phy-cells = <0>;
status = "disabled";
;
;
;
#USB2.0 PHY1
usb2phy1_grf: syscon@fd5d4000
......
;
#USB2.0 PHY2
usb2phy2_grf: syscon@fd5d8000
......
;
#USB2.0 PHY3
usb2phy3_grf: syscon@fd5dc000
......
;
#USB3.1/DP Combo PHY0
usbdp_phy0: phy@fed80000
compatible = "rockchip,rk3588-usbdp-phy";
......
usbdp_phy0_dp: dp-port
#phy-cells = <0>;
status = "disabled";
;
usbdp_phy0_u3: u3-port
#phy-cells = <0>;
status = "disabled";
;
;
#USB3.1/DP Combo PHY1
usbdp_phy1: phy@fed90000
......
;
#USB3.1/SATA/PCIe PHY2
combphy2_psu: phy@fee20000
compatible = "rockchip,rk3588-naneng-combphy";
......
;
Type-C USB 3.1/DP 全功能 DTS 配置
参考 arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4.dtsi Type-C0 接口的 DTS 配置。
#USB2.0 PHY配置属性"rockchip,typec-vbus-det"，表示支持Type-C VBUS_DET常拉高的硬件设计
&u2phy0_otg
rockchip,typec-vbus-det;
;
#USB3.1/DP PHY0，需要根据硬件设计，配置属性"sbu1-dc-gpios"和"sbu2-dc-gpios"
&usbdp_phy0
orientation-switch;
svid = <0xff01>;
sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
port
#address-cells = <1>;
#size-cells = <0>;
usbdp_phy0_orientation_switch: endpoint@0
reg = <0>;
remote-endpoint = <&usbc0_orien_sw>;
;
usbdp_phy0_dp_altmode_mux: endpoint@1
reg = <1>;
remote-endpoint = <&dp_altmode_mux>;
;
;
;
#USB3.1 OTG0 Controller
&usbdrd_dwc3_0
dr_mode = "otg";
usb-role-switch;
port
#address-cells = <1>;
#size-cells = <0>;
dwc3_0_role_switch: endpoint@0
reg = <0>;
remote-endpoint = <&usbc0_role_sw>;
;
;
;
#VBUS GPIO配置，在Type-C控制器芯片驱动中控制该GPIO
vbus5v0_typec: vbus5v0-typec
compatible = "regulator-fixed";
regulator-name = "vbus5v0_typec";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio4 RK_PD0 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_usb>;
pinctrl-names = "default";
pinctrl-0 = <&typec5v_pwren>;
;
#配置外置Type-C控制器芯片FUSB302
#需要根据实际的硬件设计，配置"I2C/interrupts/vbus-supply/usb_con"的属性
&i2c2
status = "okay";
usbc0: fusb302@22
compatible = "fcs,fusb302";
reg = <0x22>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&usbc0_int>;
vbus-supply = <&vbus5v0_typec>;
status = "okay";
ports
#address-cells = <1>;
#size-cells = <0>;
port@0
reg = <0>;
usbc0_role_sw: endpoint@0
remote-endpoint = <&dwc3_0_role_switch>;
;
;
;
usb_con: connector
compatible = "usb-c-connector";
label = "USB-C";
data-role = "dual";
power-role = "dual";
try-power-role = "sink";
op-sink-microwatt = <1000000>;
sink-pdos =
<PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
source-pdos =
<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
altmodes
#address-cells = <1>;
#size-cells = <0>;
altmode@0
reg = <0>;
svid = <0xff01>;
vdo = <0xffffffff>;
;
;
ports
......
;
;
;
Note：
如果使用 HUSB311 芯片替换 FUSB302 芯片，只需要基于 FUSB302 的 DTS 配置进行简单修改即可，参考修改：
#配置外置Type-C控制器芯片HUSB311
&i2c2
usbc0: husb311@4e
compatible = "hynetek,husb311";
reg = <0x4e>;
......
;
;
Type-C to Type-A USB 3.1/DP DTS 配置
参考 arch/arm64/boot/dts/rockchip/rk3588-evb2-lp4.dtsi Type-C0 to Type-A USB 3.1/DP 的 DTS 配置。
#USB2.0 PHY0配置"phy-supply"属性，用于控制VBUS输出5V
#注意：使用phy-supply，无法实现VBUS的动态开关。如果OTG独占GPIO，不与其他HOST共用，并且OTG需要支持Device/HOST,则应该配置为"vbus-supply = <&vcc5v0_otg>",才能实现VBUS动态开关。
&u2phy0_otg
phy-supply = <&vcc5v0_host>;
;
#VBUS GPIO配置，在USB2.0 PHY驱动中控制该GPIO
vcc5v0_host: vcc5v0-host
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_usb>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
;
#USB3.1/DP PHY0，只需配置DP使用lane2/3,驱动会自动分配lane0/1给USB3.1 Rx/Tx
#如果硬件设计DP使用lane0/1，则此处应配置"rockchip,dp-lane-mux = <0 1>"
&usbdp_phy0
rockchip,dp-lane-mux = <2 3>;
;
#USB3.1 OTG0 Controller
#配置"dr_mode"为"otg"，同时配置"extcon"属性，才能支持软件切换Device/Host mode
&usbdrd_dwc3_0
dr_mode = "otg";
extcon = <&u2phy0>;
status = "okay";
;
Type-C to Type-A USB 2.0/DP DTS 配置
参考 arch/arm64/boot/dts/rockchip/rk3588-nvr-demo.dtsi Type-C1 to Type-A USB 2.0/DP 的 DTS 配置。
#USB2.0 PHY1配置"phy-supply"属性，用于控制VBUS输出5V
&u2phy1_otg
phy-supply = <&vcc5v0_host>;
status = "okay";
;
#VBUS GPIO配置，在USB2.0 PHY驱动中控制该GPIO
vcc5v0_host: vcc5v0-host-regulator
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_sys>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
;
#USB3.1/DP PHY1，配置DP使用lane0/1/2/3
#需要根据实际的硬件设计，配置属性"rockchip,dp-lane-mux"
&usbdp_phy1
rockchip,dp-lane-mux = < 0 1 2 3 >;
status = "okay";
;
&usbdp_phy1_dp
status = "okay";
;
#配置属性"maximum-speed"，通知USBDP驱动将USB限制为USB2.0 only
&usbdp_phy1_u3
maximum-speed = "high-speed";
status = "okay";
;
#配置属性"maximum-speed"，通知DWC3驱动将USB限制为USB2.0 only
&usbdrd_dwc3_1
dr_mode = "host";
maximum-speed = "high-speed";
status = "okay";
;
Type-C USB 2.0 only DTS 配置
配置1. 硬件电路带外置 Type-C 控制器芯片，支持 PD
参考 arch/arm64/boot/dts/rockchip/rk3588s-tablet-rk806-single.dtsi Type-C0 USB 2.0 OTG 的 DTS 配置
#USB2.0 PHY0注册typec orientation switch，用于与TCPM子系统交互，获取USB热拔插的信息
&u2phy0
orientation-switch;
status = "okay";
port
#address-cells = <1>;
#size-cells = <0>;
u2phy0_orientation_switch: endpoint@0
reg = <0>;
remote-endpoint = <&usbc0_orien_sw>;
;
;
;
#USB2.0 PHY0 OTG配置
#配置属性"rockchip,sel-pipe-phystatus",表示选择GRF控制pipe phystatus，替代USBDP PHY的控制
#配置属性"rockchip,typec-vbus-det"，表示支持Type-C VBUS_DET常拉高的硬件设计
&u2phy0_otg
rockchip,sel-pipe-phystatus;
rockchip,typec-vbus-det;
status = "okay";
;
#disable USBDP PHY0的所有相关节点，让USBDP PHY0处于未初始化状态，达到最低功耗的目的
&usbdp_phy0
status = "disabled";
;
&usbdp_phy0_dp
status = "disabled";
;
&usbdp_phy0_u3
status = "disabled";
;
&dp0
status = "disabled";
;
#配置USB3.1 OTG0 Controller
#配置"phys = <&u2phy0_otg>",即不引用USBDP PHY
#配置maximum-speed = "high-speed"，通知DWC3驱动将USB限制为USB2.0 only
&usbdrd3_0
status = "okay";
&usbdrd_dwc3_0
dr_mode = "otg";
status = "okay";
maximum-speed = "high-speed";
phys = <&u2phy0_otg>;
phy-names = "usb2-phy";
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