RISC-V开发推荐使用Chisel编程语言。Chisel即Constructing Hardware in a Scala Embedded Language:
Chisel is an open-source hardware construction language developed at UC Berkeley that supports advanced hardware design using highly parameterized generators and layered domain-specific hardware languages.
Hardware construction language (not C to Gates)
Embedded in the Scala programming language
Algebraic construction and wiring
Abstract data types and interfaces
Bulk connections
Hierarchical + object oriented + functional construction
Highly parameterizable using metaprogramming in Scala
Supports layering of domain specific languages
Sizeable standard library including floating-point units
Multiple clock domains
Generates low-level Verilog designed to pass on to standard ASIC or FPGA tools