STM8S903K3基于ST Visual Develop开发定时器5中断示例

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STM8S903K3基于ST Visual Develop开发定时器5中断示例


📖TIM5基本功能

  • 🌿16位向上计数和自动装载计数器

  • 🍂4位可编程(可以实时修改的)预分频器。

🚩TIM5和高级定时器TIM1差异

📓TIM5_PSCR 可配置的位只有0-3位:

  • 🌴定时器溢出时间计算公式:Tout(溢出时间)=(ARR+1)((PSC+1)/Tclk)
ARR(预重装载值) = 124;
Tclk(内部时钟频率) = 16 000 000
T = 125* (128)/16 000 000 = 0.001S = 1MS

  • ⚡定时器5在STVD环境下,中断向量表中的中断号:13

🌼示例

✨利用定时器5,1ms中断一次,0.5S让led翻转一次。

/* MAIN.C file
 * 
 * Copyright (c) 2002-2005 STMicroelectronics
 */


#include"stm8s903k3.h"
volatile unsigned int i=0;

void Init_Timer5(void)

//	CLK_ECKR = 0x01; //开启外部时钟寄存器
//  CLK_SWR = 0xb4; //HSE外部时钟源作为主时钟源
//  CLK_CKDIVR = 0x00;//不分频
  CLK_ICKR |= 0X01; //使能内部高速时钟 HSI
     CLK_CKDIVR = 0x00; // 16M
    while(!(CLK_ICKR&0x02)); //HSI准备就绪
      CLK_SWR =0xE1;//HSI内部时钟源作为主时钟源(复位值)  
			
  //TIM5_IER=0x00;//disable TIMER
		CLK_PCKENR1 |=0x80; //外设时钟门控寄存器
		TIM5_EGR=0x01;//计数器更新,可省略
		TIM5_PSCR =0x07;//3:0可配置, 2^7=128div /8 M=8us,8us*124=1ms

		TIM5_ARRH = 0x00; // 自动重载寄存器ARR=0x007c
    TIM5_ARRL = 0x7c; // 每记数500次产生一次中断,即1ms
			
//	  TIM5_RCR = 0x00;    //重复计数器值
    TIM5_SR1 = ( ~0x01 );          //清除更新中断标志
		TIM5_CR1=0x01;//enable 使能计数器
		TIM5_IER=0x01;//更新中断使能
		
		


void Init_GPIO(void)

		PD_DDR |=0x80;// 配置PD端口的方向寄存器PD7输出
	  PD_CR1 |=0x80;// 设置PD7为推挽输出
	  PD_CR2 |=0x00;

void main()

	_asm("sim");    //disable all interrupt
	Init_GPIO();
	Init_Timer5();
	_asm("rim");

	while (1);


@far @interrupt void TIM5_UPD_OVF_IRQHandler (void)

		i++;
      TIM5_SR1 =0x00;// 清除更新中断标记,这步不能漏掉
if(i ==498)

			PD_ODR ^= 0x80;
			i =0;




  • 📈通过逻辑分析仪采集的波形
  • stm8_interrupt_vector.c代码
typedef void @far (*interrupt_handler_t)(void);

struct interrupt_vector 
	unsigned char interrupt_instruction;
	interrupt_handler_t interrupt_handler;
;

@far @interrupt void NonHandledInterrupt (void)

	/* in order to detect unexpected events during development, 
	   it is recommended to set a breakpoint on the following instruction
	*/
	return;


extern void _stext();     /* startup routine */
extern  @far @interrupt void TIM5_UPD_OVF_IRQHandler (void);
struct interrupt_vector const _vectab[] = 
	0x82, (interrupt_handler_t)_stext, /* reset */
	0x82, NonHandledInterrupt, /* trap  */
	0x82, NonHandledInterrupt, /* irq0  */
	0x82, NonHandledInterrupt, /* irq1  */
	0x82, NonHandledInterrupt, /* irq2  */
	0x82, NonHandledInterrupt, /* irq3  */
	0x82, NonHandledInterrupt, /* irq4  */
	0x82, NonHandledInterrupt, /* irq5  */
	0x82, NonHandledInterrupt, /* irq6  */
	0x82, NonHandledInterrupt, /* irq7  */
	0x82, NonHandledInterrupt, /* irq8  */
	0x82, NonHandledInterrupt, /* irq9  */
	0x82, NonHandledInterrupt, /* irq10 */
	0x82, NonHandledInterrupt, /* irq11 */
	0x82, NonHandledInterrupt, /* irq12 */
	0x82, TIM5_UPD_OVF_IRQHandler, /* irq13 TIM5*/
	0x82, NonHandledInterrupt, /* irq14 */
	0x82, NonHandledInterrupt, /* irq15 */
	0x82, NonHandledInterrupt, /* irq16 */
	0x82, NonHandledInterrupt, /* irq17 */
	0x82, NonHandledInterrupt, /* irq18 */
	0x82, NonHandledInterrupt, /* irq19 */
	0x82, NonHandledInterrupt, /* irq20 */
	0x82, NonHandledInterrupt, /* irq21 */
	0x82, NonHandledInterrupt, /* irq22 */
	0x82, NonHandledInterrupt, /* irq23 */
	0x82, NonHandledInterrupt, /* irq24 */
	0x82, NonHandledInterrupt, /* irq25 */
	0x82, NonHandledInterrupt, /* irq26 */
	0x82, NonHandledInterrupt, /* irq27 */
	0x82, NonHandledInterrupt, /* irq28 */
	0x82, NonHandledInterrupt, /* irq29 */
;

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