HDLBits --- Count clock

Posted XiaoMing_sususu

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HDLBits Count clock

这是一个比较常规的题目 但是有一点需要注意的是要求的显示方式是BCD码 需要二进制转BCD但是并不需要我们专门为这个写一个function来实现二进制转BCD码在这个轻量级的设计中 我们只需要了解拼接方式并且赋值即可。

下面这个例子来了解 二进制和BCD码的显示方式:

module tb_test();
reg [7:0] cout;
reg [7:0] cout1;
initial 
begin
	cout  = 4'd1,4'd2;
	cout1 = 8'd12;

** 测试样例 : **

下面是代码:

module top_module( 
           input clk,
		   input reset,
		   input ena,
		   output reg pm,
		   output reg [7:0] hh,
		   output reg [7:0] mm,
		   output reg [7:0] ss
	 ); 
reg ap_change =1'b0;
always@(posedge clk)
begin
          if(reset)
		  begin
		        hh[7:0]=4'd1,4'd2;
				mm[7:0]=8'd0;
				ss[7:0]=8'd0;
		  end
		  else if(ena)
		  begin
		       if(ss[3:0] < 4'd9)
					ss[3:0] <= ss[3:0] +1'b1;
			   else  if(ss[3:0] == 4'd9 && ss[7:4] < 4'd5)
			   begin
			        ss[3:0] <= 4'd0; 
			        ss[7:4] <= ss[7:4] +1'b1;
		       end
			   else  if(ss[3:0] == 4'd9 && ss[7:4] == 4'd5) //add
			   begin
			         ss[7:0] <=  8'd0;
					 if(mm[3:0] < 4'd9)
					    mm[3:0] <= mm[3:0] +1'b1;
					 else if(mm[3:0] == 4'd9 && mm[7:4] < 4'd5)
		             begin
					        mm[3:0] <= 4'd0; 
							mm[7:4] <= mm[7:4] +1'b1;
					 end
					 else if(mm[3:0] == 4'd9 && mm[7:4] == 4'd5)//add
					 begin
					      mm[7:0] <=  8'd0;
						 if(hh[3:0] < 4'd9 &&  hh[7:4] <1'b1)  //
						 begin
							hh[3:0] <= hh[3:0] +1'b1;
						 end
						 else if(hh[3:0] == 4'd9 && hh[7:4] < 4'd1)
						 begin
								hh[3:0] <= 4'd0;
								hh[7:4] <= 1'b1;
						 end
						 else if(hh[3:0] == 4'd0 && hh[7:4]== 4'd1)
						 begin
								hh[3:0] <= hh[3:0]  +1'b1;
								hh[7:4] <= 1'b1;
						 end
						 else if(hh[3:0] == 4'd1 && hh[7:4] == 4'd1)
						 begin
								hh[3:0] <= hh[3:0]  +1'b1;
								hh[7:4] <= 1'b1;
						 end
						 else if(hh[3:0] == 4'd2 && hh[7:4] == 4'd1)
						 begin
						        hh[3:0] <= 4'd1;
								hh[7:4] <= 4'd0;
						 end
					 end
			   end		
		  end
end
always@(posedge clk)
begin
         if(reset)
		 begin
			pm <= 1'b0;
		 end
         else if(hh[7:4]== 4'd1 && hh[3:0]==4'd1&&mm[3:0] == 4'd9 && mm[7:4] == 4'd5&&ss[3:0] == 4'd9 && ss[7:4] == 4'd5)
			pm <= ~pm;
         else
			pm <= pm;
end
endmodule

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